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The Z80 CPU is paired with 16kb or 48kb of dynamic RAM (DRAM). Unlike static RAM, DRAM forgets data unless every row is read every 4ms (the refresh cycle). The Z80 has a built-in refresh register, but it’s weak. The ULA steals bus cycles from the Z80. It pretends to be the bus master, fakes a memory read to refresh a row of DRAM, then hands the bus back. The Z80 never notices.
