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| Principle | Description | Implementation | |-----------|-------------|----------------| | | All tensors default to FP32; FP64 optional for scientific workloads. | No automatic down‑casting; kernels compiled with ‑fmad=false to prevent fused‑multiply‑add rounding shortcuts. | | Modular Graphs | Sub‑graphs are reusable components with version control. | FGL treats sub‑graphs as modules ; they can be imported via import "module_name" and instantiated multiple times. | | Deterministic Execution | Identical inputs → identical outputs on any supported hardware. | Deterministic reduction algorithms (e.g., Kahan summation) and fixed‑seed RNG streams embedded in the provenance ledger. | | Provenance‑by‑Design | Every mutation to the model or data is logged. | Cryptographic Merkle‑tree of operation hashes stored in a local or distributed ledger (compatible with IPFS). | | Hardware‑agnostic Performance | Same model runs efficiently on GPUs, CPUs, TPUs, and emerging neuromorphic chips. | Backend provides auto‑kernel generation (via LLVM‑based JIT) and runtime profiling to select optimal kernels per device. |
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